1. Field of the Invention
The present disclosure relates to an MEMS (Microelectromechanical Systems) sensor, and more particularly to an integrated apparatus vertically stacking a microelectromechanical system device and an integrated circuit chip and methods for fabricating the same.
2. Description of Related Art Including Information Disclosed Under 37 CFR 1.97 and 37 CFR 1.98
As MEMS (Microelectromechanical Systems) sensors have become increasingly common in consumer electronic products (for example, microphones for cellular phones or accelerometers for interactive game input devices), the MEMS sensor market has become correspondingly competitive, not only in terms of manufacturing cost, but also size and quality of hermetic sealing, which is required for certain MEMS applications, such as inertia devices (for example, accelerometer, angular rate sensor, oscillator, etc.), which require a hermetic chamber to maintain sensitivity. For MEMS sensors, scale of miniaturization and integrity of sealing process have become important quality factors.
Conventionally, MEMS sensors are fabricated by the steps of: fabricating the microelectromechanical system device and the integrated circuit chip respectively, integrating them into a sensing system by wire bonds; and disposing it in a package so as to form a system-in-package. But the integration is costly and can result in an large package. To reduce size and manufacturing cost, the industry has sought alternative methods for integrating the microelectromechanical system device and the integrated circuit into the same chip.
There are two basic methods of integrating a microelectromechanical system device and integrated circuit: plane integration and vertical integration. Plane integration can combine the microelectromechanical system device and the integrated circuit on the same silicon substrate, for example, by fabricating the microelectromechanical system device and the integrated circuit simultaneously on the silicon substrate of a chip by the CMOS (Complementary Metal Oxide Semiconductor) process. Alternatively, in order to reduce the footprint area of the sensing device, vertical integration can be utilized to stack the microelectromechanical system device on the integrated circuit chip vertically and form a hermetic chamber, which assures the MEMS inertia device (for example, an accelerometer, an angular rate sensor, an oscillator and so on) retains sensitivity during operation.
FIG. 1 shows a vertically integrated microelectromechanical system apparatus 10 disclosed by U.S. Pat. No. 7,104,129. As shown in FIG. 1, the vertically integrated microelectromechanical system apparatus 10 mainly comprises a hermetic chamber 14 constructed by a lid 12, an outer frame 13 and an integrated circuit chip 11. The microelectromechanical system device 16 is disposed in the hermetic chamber 14 and connected to the outer frame 13. The electrical signal sensed by the microelectromechanical system device 16 is transmitted to the integrated circuit chip 11 by an conductive bonding pad 17 disposed below the outer frame 13 at the periphery.
Although the vertically integrated microelectromechanical system apparatus 10 utilizes vertical stacking to reduce the footprint area of the whole device, the microelectromechanical system device 16 can only be connected to the outer frame 13 disposed at the periphery, and cannot be connected to other locations, which narrows its potential scope of application. On the other hand, in the vertically integrated microelectromechanical system apparatus 10, an insulating layer 15 is disposed between the outer frame 13 and the lid 12. Therefore, the vertically integrated microelectromechanical system apparatus 10 does not have the function for shielding electromagnetic interference, and the sensing signal in the vertically integrated microelectromechanical system apparatus 10 is easily affected by external electromagnetic interference. Moreover, although the vertically integrated microelectromechanical system apparatus 10 discloses the electrical connection from the microelectromechanical system device 16 to the integrated circuit chip 11 (first level interconnection), it does not disclose the electrical connection from the integrated circuit chip 11 to external electrical connection (second level interconnection). Therefore, the vertical integration only achieve limited reduction in footprint area for such a device.
During the process (please refer to the specification of U.S. Pat. No. 7,104,129), the wafer used for forming the lid 12 and the wafer used for forming the microelectromechanical system device 16 are stacked in order and are bonded together. If the above-mentioned two wafers are not precisely aligned with each other, alignment errors may be accumulated when the stacked wafers are bonded with the wafer used for forming the integrated circuit chip 11. The accumulated alignment error could result in bonding defects, thereby decreasing the yield rate of the final vertically integrated microelectromechanical system apparatus 10.
Therefore, it is necessary to provide a better structure and process for the vertically integrated microelectromechanical system apparatus to solve the above-mentioned problems such as narrow scope of application, vulnerability to electromagnetic interference, larger physical scale of the device and poor yield rate of fabrication.